The initial phase of the project involved an extensive literature review to analyze various power converter topologies in terms of efficiency, inductor size, cost, control challenges, and other factors. The most promising topologies identified were Si-based 3-Level CCM, GaN-based two-phase interleaved CCM TP, and two-phase interleaved CrM TP PFCs. Despite its potential for high efficiency, the CrM TP PFC faced implementation challenges, leading the focus to shift towards CCM topologies. The consensus is to design and optimize two converters for the PFC stage: a multi-level PFC converter with n-level legs and a new soft-switching PFC converter at an optimized switching frequency. The project also optimizes an LLC converter to achieve a complete system for a 3700W/48V battery charger for light electric vehicles (LEVs).
System Level Optimization
One of the initial steps involves investigating and optimizing multi-level and multi-leg continuous-conduction-mode (CCM) and a soft-switching power factor correction (PFC) converter topologies as potential candidates to achieve the desired performance. This is followed by the development of accurate analytical models for major power converter components and the implementation of a system-level optimization approach to enhance converter designs.Â
A significant contribution of the project was the establishment of a simple equation-based relationship between gate drive strength and voltage overshoot for Gallium-Nitride (GaN) field-effect-transistors (FETs). This tool provides valuable insights into the limitations of each GaN FET, enabling a fair comparison of switching losses across different GaN FETs without the need for extensive SPICE simulations for each FET. This advancement streamlines the design and selection process, saving time and resources.
Thermal management is crucial for the efficient operation of power converters. The project has made strides in accurate thermal modeling of GaN FETs using the Ansys Icepak tool. Different package designs were modeled to obtain the thermal resistances from the die to the ambient for various heat sink mounting types. This 3D modeling of packages allows researchers to optimize the best heat sinking method on the final prototype, ensuring efficient thermal management and improved converter performance.
A novel magnetics optimization tool was proposed for gapped-core magnetics, primarily for LLC converters. This innovative tool employs the Big-Bang Big-Crunch optimization method and considers various design factors such as volume, power loss, and cost when selecting and designing the best core. The algorithm also investigates the possibility of designing multi-core transformers that can result in lower values for the given penalty function. The design results, including magnetizing inductance, flux density, current density, and power losses, were verified using 3D models generated in Ansys Maxwell software. The effects of interleaved windings were also investigated, providing valuable insights into optimizing transformer design.
The project has made significant advancements in noise modeling for TP PFC converters. For the first time in literature, differential mode (DM) noise has been mathematically modeled for these converters, taking into account multi-leg and multi-level structures. This noise model is essential for estimating the size of EMI filters, which helps determine the ideal topology and switching frequency for the converter. Furthermore, the total volume of magnetics and EMI filters has been compared across various TP PFC topologies, providing valuable insights into the best design choices.
In addition to DM noise modeling, common mode (CM) noise has been accurately modeled to estimate EMI filter components in conjunction with DM noise. The researchers identified the effects of MOSFET turn-on and turn-off speeds, duty cycle, and zero-crossings on TP PFC converters for the first time in literature. This detailed analysis further refines the design and optimization process, ensuring the best possible converter performance.
